CNAOB-Communications-Protocol-Notes: Difference between revisions
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== CNAOB Serial Port Configuration == | == CNAOB Serial Port Configuration == | ||
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== CRC CheckSum Algorithm == | == CRC CheckSum Algorithm == | ||
[http://iatips.com/crc_c.txt CRC calculation source code] | |||
16-bit CRC verification code | 16-bit CRC verification code | ||
Revision as of 16:55, 8 July 2008
CNAOB Serial Port Configuration
Each message consists of 1 start bit (0), 8 data bits and 2 stop bits (1).
CRC CheckSum Algorithm
16-bit CRC verification code
Only 8 data bits are involved in CRC calculation, with the exclusion of start bit and end bit.
Algorithm of CRC code:
- 1) Presetting a 16-bit register to hex FFFF (namely 1 for all bits in binary system). The register is called CRC register
- 2) XORing the first 8-bit binary data (the first byte of the communication message frame) with the low 8-bit of 16-bit CRC register,
then storing the result in CRC register
- 3) Right-shifting the register data by one bit (towards lower bit) and filling the highest bit with 0, then checking the shift-out bit
- 4) If the shift-out bit is 0, repeat step 3 (right-shifting one more bit);
If the shift-out bit is1, XOR the CRC register data with polynomial A001 (1010 0000 0000 0001)
- 5) Repeating step 3 and step 4 until all of the 8-bit data have been processed after 8 right-shift operations;
- 6) Repeating step 2 to step 5 to process the next byte of the communication message frame;
- 7) When calculation procedures of the first 5 bytes in the communication message frame are completed, the 16-bit CRC verification
code will be generated in the 16-bit CRC register.